The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2006
Filed:
Mar. 10, 2005
Kazuki Tsujimura, Shiga, JP;
Hidenari Kanehara, Osaka, JP;
Norihiko Sumitani, Osaka, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
An SRAM includes: a memory cell array; and a control circuit. Each memory cell includes: inverters; and access transistors interposed in lines connecting internal nodes in the respective inverters and a pair of bit lines BIT and NBIT. The control circuit includes a bias circuit for transmitting signals to the bit lines BIT and NBIT. A memory cell power supply terminal and a control circuit power supply terminal are isolated from each other. When power is turned on, the bias circuit sets one of the bit lines at a power supply potential (high potential) and the other bit line at a ground potential, so that a minute potential difference is generated between the internal nodes and thereby data is initialized. Transistors in the memory cell do not need to be asymmetric.