The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7135998 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 14, 2006

Filed:

May. 08, 2003
Applicants:

Wolfgang Fey, Niedernhausen, DE;

Mario Engelmann, Steinbach/Ts, DE;

Peter Oehler, Frankfurt am Main, DE;

Inventors:

Wolfgang Fey, Niedernhausen, DE;

Mario Engelmann, Steinbach/Ts, DE;

Peter Oehler, Frankfurt am Main, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a circuit arrangement for the error-free analog-to-digital conversion of N analog input signals Nin a plurality of digital output signals corresponding to the number N using exactly one analog-to-digital converter, wherein N>=1, wherein further N' other redundancy inputs N′are provided, and being fed to the said analog-to-digital converter, wherein the N and the N′ inputs are supplied to at least one analog multiplexer, and wherein the circuit arrangement has an error monitoring functionality, and each input signal Nis counter to the corresponding redundancy signal N′. The invention also relates to the use of the circuit arrangement in electronic motor vehicle control units with an anti-lock function.


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