The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2006
Filed:
Sep. 20, 2004
Guy Schlacter, Buffalo Grove, IL (US);
Guy Schlacter, Buffalo Grove, IL (US);
KLP International, Ltd., Santa Clara, CA (US);
Abstract
The embodiments of the present invention relate to the general area of Field Programmable Gate Arrays and, in particular, to Field Programmable Gate Arrays ('FPGAs') comprising memory cells with both volatile and nonvolatile properties, and the control and management of each portion to overcome the disadvantages of each individual technology. Some of the advantages of combining the two properties in a single FPGA are power reduction, shorter power-on time, configuration flexibility, instant-on logic capability, cost savings in system components including nonvolatile instant-on devices, configuration memories, and standard CMOS process. Furthermore, to optimize these and other advantages of the proposed architecture, additional apparatus and methods are presented to individually and collectively manage and control different parts of such hybrid FPGAs.