The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2006
Filed:
Nov. 30, 2004
Julio Costa, Summerfield, NC (US);
Tony Ivanov, Summerfield, NC (US);
Michael Carroll, Jamestown, NC (US);
Julio Costa, Summerfield, NC (US);
Tony Ivanov, Summerfield, NC (US);
Michael Carroll, Jamestown, NC (US);
RF Micro Devices, Inc., Greensboro, NC (US);
Abstract
A flip chip power device having an integrated low inductance ground and heat sink path and an isolation structure is provided. A substrate is formed having transistors and an ohmic contact region circumscribing the transistors. Dielectric layers are formed on the substrate, and a common metal layer is formed on the dielectric layers. An isolation metal layer is formed on the dielectric layers above the ohmic contact region. The common metal layer is coupled to a first region of each of the transistors, and the isolation metal layer is coupled to the ohmic contact region. A first bump is formed on the common metal layer, and a second bump is formed on the isolation metal layer. When the power device is attached to a second substrate, the first bump forms a low inductance ground and heat sink path to the second substrate, and an isolation structure is formed.