The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7133996 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 07, 2006

Filed:

Oct. 25, 2002
Applicants:

Shinichiro Ikeda, Kasugai, JP;

Yoshiharu Kato, Kasugai, JP;

Inventors:

Shinichiro Ikeda, Kasugai, JP;

Yoshiharu Kato, Kasugai, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device for ensuring efficient access and reduction in current consumption. The memory device includes a plurality of memory cells arranged in accordance with a first address and a second address which define a logical address map indicating a logical shape of the memory array. An address map changing unit is operatively coupled to the memory array, for receiving a first address signal for generating the first address and a second address signal for generating the second address. The address map changing unit is capable of changing the logical address map by altering a part of one of the first address signal and the second address signal.


Find Patent Forward Citations

Ikeda, Shinichiro. (2006). Memory device and internal control method therefor (U.S. Patent No. 7133996). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7133996

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…