The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 07, 2006
Filed:
Oct. 18, 2004
D. Dwight Brayton, Richland, WA (US);
Stephen G. Romero, Richland, WA (US);
Christopher S. Ghormley, Berkley, CA (US);
Mark E. Dallas, Valdez, AK (US);
D. Dwight Brayton, Richland, WA (US);
Stephen G. Romero, Richland, WA (US);
Christopher S. Ghormley, Berkley, CA (US);
Mark E. Dallas, Valdez, AK (US);
Flour Technologies Corporation, Aliso Viejo, CA (US);
Abstract
Methods and apparatus are provided which allow control systems to be tested. Specifically, a test system is coupled to a control system in a manner which allows the test system to communicate with and drive the control system by sending and receiving signals via both the controller-I/O communication channel and the field I/O connectors. In essence, the test system is used to both simulate a plant to be controlled and to monitor, validate, and or modify the internal state of the control system controller and possibly the control system I/O interface. Plant simulation is accomplished by simulating the I/O devices to which the control system is coupled (and hence the plant processes) when installed in its operational environment. In addition to the simulation of I/O devices, the test system takes advantage of the fact that many commonly used controller and I/O interfaces are capable of communication with other devices by using such communications ability to provide instructions to or obtain information from a control system's controller(s) and I/O interface(s).