The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7132738 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 07, 2006

Filed:

Feb. 23, 2004
Applicant:

Hiroyuki Tomimatsu, Sakata, JP;

Inventor:

Hiroyuki Tomimatsu, Sakata, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention enhances reliability and achieves higher speeds for semiconductor devices with a stacked structure. A semiconductor device includes a die pad, a plurality of semiconductor chips stacked on one surface of the die pad, leads extending toward the die pad, first wires that are bonded to first pads of a first semiconductor chip among the plurality of semiconductor chips and to second pads of a second semiconductor chip among the plurality of semiconductor chips, second wires that are bonded to the leads and to the first pads or the second pads, and a sealing material that seals the plurality of semiconductor chips and exposes another surface of the die pad.


Find Patent Forward Citations

Tomimatsu, Hiroyuki. (2006). Semiconductor device having multiple semiconductor chips stacked in layers and method for manufacturing the same, circuit substrate and electronic apparatus (U.S. Patent No. 7132738). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7132738

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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