The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2006
Filed:
Dec. 09, 2003
Todd Arthur Cannon, Rochester, MN (US);
William James Csongradi, Jr., Rochester, MN (US);
Roger John Gravrok, Eau Claire, WI (US);
Mark Owen Maxson, Mantorville, MN (US);
David Lawrence Pease, Rochester, MN (US);
Ryan James Schlichting, Rochester, MN (US);
Patrick Evarist Sobotta, Stewartville, MN (US);
Todd Arthur Cannon, Rochester, MN (US);
William James Csongradi, Jr., Rochester, MN (US);
Roger John Gravrok, Eau Claire, WI (US);
Mark Owen Maxson, Mantorville, MN (US);
David Lawrence Pease, Rochester, MN (US);
Ryan James Schlichting, Rochester, MN (US);
Patrick Evarist Sobotta, Stewartville, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, apparatus and computer program product are provided for implementing automated detection of excess aggressor shape capacitance coupling in printed circuit board layouts. A PCB design file containing an electronic representation of a printed circuit board design is received. A list of candidate shapes is identified. The candidate shapes are disposed on layers adjacent to aggressor planes. A capacitance coupling the candidate shapes to adjacent aggressor planes is calculated. A ratio of the calculated capacitance and a decoupling capacitance connecting the candidate shapes to a reference plane is determined. The PCB design file containing an electronic representation of a printed circuit board design includes shape data and text data that are extracted to produce a list of shapes' names, areas, locations and planes; and includes data defining thickness and relative permittivity of the dielectric layers used for calculating the effective capacitance is an inter-layer parallel-plate effective capacitance.