The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2006

Filed:

Feb. 25, 2005
Applicants:

Antonino Conte, Tremestieri Etneo, IT;

Mario Micciche′, Agrigento, IT;

Alberto José Di Martino, Siracusa, IT;

Alfredo Signorello, Tremestieri Etneo, IT;

Inventors:

Antonino Conte, Tremestieri Etneo, IT;

Mario Micciche′, Agrigento, IT;

Alberto José Di Martino, Siracusa, IT;

Alfredo Signorello, Tremestieri Etneo, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device formed by an array of memory cells extending in rows and columns. The device is formed by a plurality of N-type wells extending parallel to the rows; each N-type well houses a plurality of P-type wells extending in a direction transverse to the rows. A plurality of main bitlines extend along the columns. Each P-type well is associated to a set of local bitlines that extend along the respective P-type well and are coupled to the drain terminals of the cells accommodated in the respective P-type well. Local-bitlines managing circuits are provided for each P-type well and are located between the main bitlines and a respective set of local bitlines for controllably connecting each local bitline to a respective main bitline.


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