The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2006
Filed:
Jul. 30, 2004
Applicant:
Hari B. Dubey, Dt-Ghazipur, IN;
Inventor:
Hari B. Dubey, Dt-Ghazipur, IN;
Assignee:
STMicroelectronics Pvt. Ltd., Noida, IN;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/082 (2006.01); H03K 3/42 (2006.01); H01L 35/00 (2006.01); H01L 37/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A CMOS to PECL voltage level converter includes a pad driver containing drive compensation circuitry and a feedback circuit for sensing the output drive level and providing control signals to the drive compensation circuitry for compensating for temperature and process variations while minimizing power consumption.
Quick Actions:
Dubey, Hari. (2006). Cmos to pecl voltage level converter (U.S. Patent No. 7129750). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7129750
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile