The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2006
Filed:
Apr. 29, 2004
Todd Arthur Cannon, Rochester, MN (US);
William James Csongradi, Jr., Rochester, MN (US);
Benjamin Aaron Fox, Rochester, MN (US);
Roger John Gravrok, Eau Claire, WI (US);
Mark Kenneth Hoffmeyer, Rochester, MN (US);
David Lawrence Pease, Rochester, MN (US);
Ryan James Schlichting, Rochester, MN (US);
Todd Arthur Cannon, Rochester, MN (US);
William James Csongradi, Jr., Rochester, MN (US);
Benjamin Aaron Fox, Rochester, MN (US);
Roger John Gravrok, Eau Claire, WI (US);
Mark Kenneth Hoffmeyer, Rochester, MN (US);
David Lawrence Pease, Rochester, MN (US);
Ryan James Schlichting, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and structures are provided for implementing customizable dielectric printed circuit card traces. A void is defined near selected signal traces. The void is then filled with a dielectric material having a predefined dielectric property. The dielectric material is selected to alter at least one predefined electrical property of the selected signal traces, such as, coupling, propagation delay and attenuation. In one embodiment, an outer layer of a printed circuit card includes a plurality of signal traces and a mating circuit card layer including a plurality of matching signal traces is attached to the outer layer of the printed circuit card to create a cavity near selected signal traces. The cavity is filled with the selected dielectric material. In another embodiment, dielectric material is selectively removed near signal traces on an outer layer of the printed circuit card to define a void near selected signal traces.