The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2006
Filed:
Sep. 17, 2004
Jengping Liu, San Jose, CA (US);
Jackson H. Ho, Palo Alto, CA (US);
Chinnwen Shih, Santa Clara, CA (US);
Michael L. Chabinyc, Burlingame, CA (US);
William S. Wong, San Carlos, CA (US);
JengPing Liu, San Jose, CA (US);
Jackson H. Ho, Palo Alto, CA (US);
Chinnwen Shih, Santa Clara, CA (US);
Michael L. Chabinyc, Burlingame, CA (US);
William S. Wong, San Carlos, CA (US);
Palo Alto Research Center Incorporated, Palo alto, CA (US);
Abstract
Controlled overetching is utilized to produce metal patterns having gaps that are smaller than the resolution limits of the feature patterning (e.g., photolithography) process utilized to produce the metal patterns. A first metal layer is formed and masked, and exposed regions are etched away. The etching process is allowed to continue in a controlled manner to produced a desired amount of over-etching (i.e., undercutting the mask) such that an edge of the first metal layer is offset from an edge of the mask by a predetermined gap distance. A second metal layer is then deposited such that an edge of the second metal layer is spaced from the first metal layer by the predetermined gap distance. The metal gap is used to define, for example, transistor channel lengths, thereby facilitating the production of transistors having channel lengths defined by etching process control that are smaller than the process resolution limits.