The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2006

Filed:

Jan. 03, 2005
Applicants:

Jerome Pratlong, Aix-en-Provence, FR;

Marc Merandat, Venelles, FR;

Stephane Ricard, Marseille, FR;

Sylvie B. Vergnes, Trets, FR;

Laureline Bour, Pourrieres, FR;

Inventors:

Jerome Pratlong, Aix-en-Provence, FR;

Marc Merandat, Venelles, FR;

Stephane Ricard, Marseille, FR;

Sylvie B. Vergnes, Trets, FR;

Laureline Bour, Pourrieres, FR;

Assignee:

Atmel Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Program column latch circuitry of nonvolatile memory is provided with read-back capability to verify that data bits have been correctly loaded into the latch circuits and written to the memory cells. The interface between the low voltage latches and the external input and output data paths is provided with opposite-facing tri-state buffers that allow latched data to be read out for comparison and verification. Writing of latched data to memory cells can be verified by the read-back without needing any external RAM.


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