The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2006

Filed:

Jun. 17, 2005
Applicants:

Jinyong Yuan, Cupertino, CA (US);

Peter Kazarian, San Jose, CA (US);

Inventors:

Jinyong Yuan, Cupertino, CA (US);

Peter Kazarian, San Jose, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

Circuitry is disclosed for emulating asynchronous clear on each of a read address register of a memory cell and a data output register of a memory cell such that the memory cell can be defined in a memory structure that does not support asynchronous clear capability. The emulation includes defining the memory cell to have a registered read address input and a data output connected to an input of a multiplexer. The register connected to the read address input of the multiplexer does not include an asynchronous clear connection. The data transmitted from the memory cell to the multiplexer is output from the multiplexer when an asynchronous clear signal has not been asserted. However, the multiplexer is further connected to output either null data or a ground signal in lieu of the data transmitted from the memory cell when an asynchronous clear signal has been asserted.


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