The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2006
Filed:
Sep. 17, 2001
S. Jauher A. Zaidi, San Jose, CA (US);
Michael Ou, Newark, CA (US);
Lyle E. Adams, San Jose, CA (US);
Stephen Chappell, Cupertino, CA (US);
Savitha Gandikota, Sunnyvale, CA (US);
Jon Udell, Fort Collins, CO (US);
Brian Gutcher, Loveland, CO (US);
Jef Munsil, Fort Collins, CO (US);
S. Jauher A. Zaidi, San Jose, CA (US);
Michael Ou, Newark, CA (US);
Lyle E. Adams, San Jose, CA (US);
Stephen Chappell, Cupertino, CA (US);
Savitha Gandikota, Sunnyvale, CA (US);
Jon Udell, Fort Collins, CO (US);
Brian Gutcher, Loveland, CO (US);
Jef Munsil, Fort Collins, CO (US);
Palmchip Corporation, Santa Clara, CA (US);
Abstract
A pre-designed system-on-chip architecture and method includes several standard library devices, HDL source code, simulation environment and regression, synthesis scripts, software header files, software libraries, ASIC verification test suites, and makefiles. The standard library devices comprise an integrated CPU, a shared memory controller, a peripheral controller, system peripherals, a DMA controller, embedded memory, and general system control. CPU bridges are used to accommodate a variety of processor types and to insulate users from the complexities of interfacing to different kinds of processors. Such CPU bridges further allow the latest processors to be rapidly integrated into existing integration platforms and designs.