The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2006
Filed:
Mar. 14, 2001
Masaki Hashimura, Aichi, JP;
Takao Sato, Aichi, JP;
Koichi Ota, Aichi, JP;
Toyoda Gosei Co., Ltd., Aichi, JP;
Abstract
A method for dividing a semiconductor wafer into chips according to the present invention is a method for dividing a semiconductor wafer into a large number of semiconductor chips, the semiconductor wafer having a semiconductor layer formed on a substrate. A first method includes the step of forming a blast-resistant mask on a surface of the semiconductor wafer, the blast-resistant mask having a pattern for leaving a grid-like exposed portion as it is and the step of blasting a fine particular blast material to thereby form dividing grooves reaching a predetermined depth of the substrate in the grid-like exposed portion. A second method includes the step of forming first dividing grooves in a surface of the semiconductor wafer in which the semiconductor layer is formed, by dicing, etching or blasting, so that the first dividing grooves have a relatively narrow groove width, and the step of forming second dividing grooves in a surface of the semiconductor wafer in which the semiconductor layer is not formed by dicing, and in positions corresponding to the first dividing grooves, so that the second dividing grooves have a relatively wide groove width.