The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2006

Filed:

Oct. 29, 2004
Applicants:

Satoshi Kadoiri, Chigasaki, JP;

Hiroshi Morishima, Yokohama, JP;

Makoto Aoki, Kawasaki, JP;

Isao Nagase, Ebina, JP;

Osamu Kohama, Yokohama, JP;

Hirofumi Sahara, Yokohama, JP;

Inventors:

Satoshi Kadoiri, Chigasaki, JP;

Hiroshi Morishima, Yokohama, JP;

Makoto Aoki, Kawasaki, JP;

Isao Nagase, Ebina, JP;

Osamu Kohama, Yokohama, JP;

Hirofumi Sahara, Yokohama, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 11/00 (2006.01); G06F 15/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a high performance storage system, in which a cache memory is effectively used and access loads are balanced. In a computer system including a computer and a storage system coupled with the computer, the storage system includes one or more channel adapters which communicate with the computer, and a plurality of logical units which store data. The computer includes one or more host bus adapters which communicate with the storage system, and a path management module which manages a path along which the computer accesses the logical unit. The path management module includes a load measurement module which measures an access load on each logical unit, and an active path setting module which sets one or more active paths, along which an access from the computer passes, for each of the logical unit based on the measured access load.


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