The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2006
Filed:
Apr. 28, 2003
Gregory William Alexander, Austin, TX (US);
Scott Bruce Frommer, Cold Spring, NY (US);
David Stephen Levitan, Austin, TX (US);
Balaram Sinharoy, Poughkeepsie, NY (US);
Gregory William Alexander, Austin, TX (US);
Scott Bruce Frommer, Cold Spring, NY (US);
David Stephen Levitan, Austin, TX (US);
Balaram Sinharoy, Poughkeepsie, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Branch prediction logic is enhanced to provide a monitoring function for certain conditions which indicate that the use of separate BHTs and predicted target address cache would provide better results for branch prediction. The branch prediction logic responds to the occurrence of the monitored condition by logically splitting the BHTs and count cache so that half of the address space is allocated to a first thread and the second half is allocated to the next thread. Prediction-generated addresses that belong to the first thread are then directed to the half of the array that is allocated to that thread and prediction-generated addresses that belong to the second thread are directed to the next half of the array that is allocated to the second thread. In order to split the array, the highest order bit in the array is utilized to uniquely identify addresses of the first and the second threads.