The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2006
Filed:
Jul. 31, 2002
Shahe H. Krakirian, Palo Alto, CA (US);
Richard A. Walter, San Jose, CA (US);
Subbaro Arumilli, Santa Clara, CA (US);
Cirillo Lino Costantino, Oakland, CA (US);
L. Vincent M. Isip, Cupertino, CA (US);
Subhojit Roy, Sunnyvale, CA (US);
Naveen S. Maveli, Sunnyvale, CA (US);
Daniel Ji Yong Park Chung, San Jose, CA (US);
Stephen D. Elstad, San Jose, CA (US);
Dennis H. Makishima, Mountainview, CA (US);
Daniel Y. Chung, San Ramon, CA (US);
Shahe H. Krakirian, Palo Alto, CA (US);
Richard A. Walter, San Jose, CA (US);
Subbaro Arumilli, Santa Clara, CA (US);
Cirillo Lino Costantino, Oakland, CA (US);
L. Vincent M. Isip, Cupertino, CA (US);
Subhojit Roy, Sunnyvale, CA (US);
Naveen S. Maveli, Sunnyvale, CA (US);
Daniel Ji Yong Park Chung, San Jose, CA (US);
Stephen D. Elstad, San Jose, CA (US);
Dennis H. Makishima, Mountainview, CA (US);
Daniel Y. Chung, San Ramon, CA (US);
Brocade Communications Systems, Inc., San Jose, CA (US);
Abstract
Placing virtualization agents in the switches which comprise the SAN fabric. Higher level virtualization management functions are provided in an external management server. Conventional HBAs can be utilized in the hosts and storage units. In a first embodiment, a series of HBAs are provided in the switch unit. The HBAs connect to bridge chips and memory controllers to place the frame information in dedicated memory. Routine translation of known destinations is done by the HBA, based on a virtualization table provided by a virtualization CPU. If a frame is not in the table, it is provided to the dedicated RAM. Analysis and manipulation of the frame headers is then done by the CPU, with a new entry being made in the HBA table and the modified frames then redirected by the HBA into the fabric. This can be done in either a standalone switch environment or in combination with other switching components located in a director level switch. In an alternative embodiment, specialized hardware scans incoming frames and detects the virtualized frames which need to be redirected. The redirection is then handled by translation of the frame header information by hardware table-based logic and the translated frames are then returned to the fabric. Handling of frames not in the table and setup of hardware tables is done by an onboard CPU.