The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2006

Filed:

Apr. 11, 2003
Applicants:

Eric James Wyers, Austin, TX (US);

Dan Stiurca, Austin, TX (US);

John James Paulos, Austin, TX (US);

Inventors:

Eric James Wyers, Austin, TX (US);

Dan Stiurca, Austin, TX (US);

John James Paulos, Austin, TX (US);

Assignee:

Vitesse Semiconductor Corporation, Camarillo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 19/00 (2006.01); H03F 3/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.


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