The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2006
Filed:
Sep. 28, 2001
Tomoo Kimura, Fukuoka, JP;
Tomonori Kataoka, Fukuoka, JP;
Yoichi Nishida, Fukuoka, JP;
Ikuo Fuchigami, Fukuoka, JP;
Ken Kawai, Osaka, JP;
Yasuhiro Ishiyama, Shiga, JP;
Tomoo Kimura, Fukuoka, JP;
Tomonori Kataoka, Fukuoka, JP;
Yoichi Nishida, Fukuoka, JP;
Ikuo Fuchigami, Fukuoka, JP;
Ken Kawai, Osaka, JP;
Yasuhiro Ishiyama, Shiga, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
In the circuit operation verifying method, initialization includes inputting circuit diagram data (a net list), specification information on respective circuit elements, and input data representing waveforms with time of voltages or currents used for operation simulation, and storing the circuit diagram data to memory. Operation of a semiconductor circuit to be verified is simulated using the circuit diagram data and the input data, and momentary voltage/current values at input terminals and the like of the circuit elements are stored in the memory. During the operation simulation, whether or not the circuit elements satisfy their voltage/current specifications and time specifications are concurrently verified based on the voltage/current values stored in the memory.