The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2006

Filed:

Jul. 24, 2003
Applicants:

Steven G. Walker, Chappaqua, NY (US);

Chandramouli Visweswariah, Croton-on-Hudson, NY (US);

Katya Scheinberg, New York, NY (US);

Phillip Restle, Katonah, NY (US);

Inventors:

Steven G. Walker, Chappaqua, NY (US);

Chandramouli Visweswariah, Croton-on-Hudson, NY (US);

Katya Scheinberg, New York, NY (US);

Phillip Restle, Katonah, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is a system and method for optimizing electrical circuits by means of derivative-free optimization. Tunable parameters such as component values, transistor sizes or model parameters are automatically adjusted to obtain an optimal circuit. Any method of measuring the performance of the circuit, including computer simulation, can be incorporated into the optimization technique, with no derivative requirements. An arbitrary continuous optimization problem can be posed, including an objective function, equality and inequality constraints, and simple bounds on the tunable parameters. The optimization technique is efficient and guarantees that it will find a locally optimal solution from any starting point. Further, the procedure includes a method of automatically recovering from electrical failure to enable automatic and productive circuit optimization. A set of measurement widgets is provided to automatically introduce the checking required to recover from electrical failure. The automated circuit optimization leads to higher quality circuits, increases designer productivity, results in a better understanding of the tradeoffs inherent in the circuit and lifts the thinking of the circuit designer to a higher level.


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