The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2006

Filed:

Jul. 18, 2001
Applicants:

Wolfgang Ernst, München, DE;

Gunnar Krause, München, DE;

Justus Kuhn, München, DE;

Jens Lüpke, München, DE;

Jochen Müller, München, DE;

Peter Pöchmüller, München, DE;

Michael Schittenhelm, Poing, DE;

Inventors:

Wolfgang Ernst, München, DE;

Gunnar Krause, München, DE;

Justus Kuhn, München, DE;

Jens Lüpke, München, DE;

Jochen Müller, München, DE;

Peter Pöchmüller, München, DE;

Michael Schittenhelm, Poing, DE;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/00 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

The method and the device generate digital signal patterns. Signal patterns or signal pattern groups are stored in a very small buffer register. The position of a following signal pattern or following signal pattern group is also stored in the form of a branch address, together with each signal pattern or each signal pattern group. A simple control logic circuit receives a control signal and determines whether the content of the currently addressed group is output continuously or the following group given by the branch address stored in the register is output after the currently selected group has been completely output. The novel method and device can advantageously be used for testing semiconductor memories and implemented in a cost-effective semiconductor circuit which is remote from a conventional test system.


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