The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2006

Filed:

Sep. 10, 2004
Applicants:

Hirofumi Shibuya, Tokyo, JP;

Takayuki Tamura, Higashiyamato, JP;

Hiroyuki Goto, Higashimurayama, JP;

Shigemasa Shiota, Tachikawa, JP;

Yasuhiro Nakamura, Tachikawa, JP;

Inventors:

Hirofumi Shibuya, Tokyo, JP;

Takayuki Tamura, Higashiyamato, JP;

Hiroyuki Goto, Higashimurayama, JP;

Shigemasa Shiota, Tachikawa, JP;

Yasuhiro Nakamura, Tachikawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

This invention realizes separate control for each memory area. A memory unit is structured by including a semiconductor memory device capable of memorizing information, the aforementioned memory device is divided into plural memory areas logically and also management table, which is capable of controlling separately each aforementioned memory area for accessing from the outside, is tabled, control information, which prohibits accessing the prescribed memory area of the aforementioned plural memory areas, is provided in the aforementioned management information, and it is prohibited to access the specified memory area from the outside in accordance with control information.


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