The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2006
Filed:
Feb. 28, 2003
Kazuhiko Amano, Suwa, JP;
Tsugio Nakamura, Nagareyama, JP;
Hiroshi Kasahara, Kashiwa, JP;
Tatsuya Shimoda, Suwa, JP;
Kazuhiko Amano, Suwa, JP;
Tsugio Nakamura, Nagareyama, JP;
Hiroshi Kasahara, Kashiwa, JP;
Tatsuya Shimoda, Suwa, JP;
Seiko Epson Corporation, Tokyo, JP;
Abstract
An information processing system that is configured in such a manner that computational processing is performed on input data in accordance with a processing sequence, for outputting data, comprises: a plurality of arithmetic units (-to-x), each computing at an arithmetic precision 2bits (where m is a natural number) based on the processing sequence; and a plurality of cascade connection terminals for cascading these arithmetic units each other. When the maximum arithmetic precision that is required during computational processing is 2bits (where n is a natural number and is fixed), x numbers of (where x is a natural number) the arithmetic units are cascaded in a manner such that the inequality x≧2/2is satisfied. When an arithmetic precision of 2bits (where n1≦n, and n1 is variable) is necessary during computational processing, x1 numbers of the arithmetic units are cascaded in a manner such that the inequality x1≧2/2(where x1 is a natural number and is variable) is satisfied. This makes it possible to easily implement an information processing system for performing computations to any desired precision in a hardware manner, and also makes it possible to support a simple hardware-based method of expanding the arithmetic precision.