The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2006

Filed:

Jun. 14, 2004
Applicants:

Koji Sakui, Setagaya-ku, JP;

Toshiharu Watanabe, Herndon, VA (US);

Inventors:

Koji Sakui, Setagaya-ku, JP;

Toshiharu Watanabe, Herndon, VA (US);

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A trench regionis formed in a memory cell P-type well. Two NAND-type memory cell units NDand NDare respectively formed along both side wall portions of this trench regionA floating gate FG and a control gate CG in these NAND-type memory cell units NDand NDare formed self-aligningly without using memory cell units NDand NDis formed via an interlayer dielectric. The bit line pitch of this bit line BL is set at 2 F. Hence, the size of a nonvolatile semiconductor memory can be reduced.


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