The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2006
Filed:
Jul. 30, 2004
Sameer Kumar Ajmera, Richardson, TX (US);
Darius L. Crenshaw, Allen, TX (US);
Stephan Grunow, Dallas, TX (US);
Satyavolu S. Papa Rao, Garland, TX (US);
Phillip D. Matz, McKinney, TX (US);
Sameer Kumar Ajmera, Richardson, TX (US);
Darius L. Crenshaw, Allen, TX (US);
Stephan Grunow, Dallas, TX (US);
Satyavolu S. Papa Rao, Garland, TX (US);
Phillip D. Matz, McKinney, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method () of forming a MIM (metal insulator metal) capacitor is disclosed whereby adverse affects associated with copper diffusion are mitigated even as the capacitor is scaled down. A layer of bottom electrode/copper diffusion barrier material () is formed () within an aperture () wherein the capacitor () is to be defined. The bottom electrode layer () is formed via a directional process so that a horizontal aspect () of the layer () is formed over a metal () at a bottom of the aperture () to a thickness () that is greater than a thickness () of a sidewall aspect () of the layer () formed upon sidewalls () of the aperture (). Accordingly, the thinner sidewall aspects () are removed during an etching act () while some of the thicker horizontal aspect () remains. A layer of capacitor dielectric material () is then conformally formed () into the apertureand over the horizontal aspect (). A layer of top electrode material () is then conformally formed () over the layer of capacitor dielectric material () to complete the capacitor stack ().