The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7113443 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 26, 2006

Filed:

Oct. 14, 2004
Applicants:

Sang Hoo Dhong, Austin, TX (US);

Hiroaki Murakami, Austin, TX (US);

Shohji Onishi, Shiga-ken, JP;

Osamu Takahashi, Round Rock, TX (US);

Inventors:

Sang Hoo Dhong, Austin, TX (US);

Hiroaki Murakami, Austin, TX (US);

Shohji Onishi, Shiga-ken, JP;

Osamu Takahashi, Round Rock, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus, a method, and a computer program product are provided for time reduction and energy conservation during address distribution in a high speed memory macro. To address these concerns, this design divides the typical data arrays into sets of paired subarrays, divides the conventional memory address latches into separate sets, and interposes one set of memory address latches between each pair of subarrays. Therefore, time is saved because the address signals have less wire length to travel and energy is saved because only one set of address latches needs to be powered on for each transmission.


Find Patent Forward Citations

Dhong, Sang. (2006). Method of address distribution time reduction for high speed memory macro (U.S. Patent No. 7113443). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7113443

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