The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2006
Filed:
Jun. 20, 2002
Tetsujiro Kondo, Tokyo, JP;
Yasushi Tatehira, Kanagawa, JP;
Nobuyuki Asakura, Tokyo, JP;
Masashi Uchida, Tokyo, JP;
Takuo Morimura, Kanagawa, JP;
Kazutaka Ando, Kanagawa, JP;
Hideo Nakaya, Kanagawa, JP;
Tsutomu Watanabe, Kanagawa, JP;
Satoshi Inoue, Kanagawa, JP;
Wataru Niitsuma, Kanagawa, JP;
Tetsujiro Kondo, Tokyo, JP;
Yasushi Tatehira, Kanagawa, JP;
Nobuyuki Asakura, Tokyo, JP;
Masashi Uchida, Tokyo, JP;
Takuo Morimura, Kanagawa, JP;
Kazutaka Ando, Kanagawa, JP;
Hideo Nakaya, Kanagawa, JP;
Tsutomu Watanabe, Kanagawa, JP;
Satoshi Inoue, Kanagawa, JP;
Wataru Niitsuma, Kanagawa, JP;
Sony Corporation, Tokyo, JP;
Abstract
A 525i (interlace) signal can be converted into a 1050i signal or a 525p (progressive) signal. A calculating circuit generates pixels of an output picture signal with a linear estimation expression of predictive taps received from a tap selecting circuit and a coefficient received from a coefficient memory. The coefficient memory stores coefficients pre-obtained for individual classes. A class is determined by combining a spatial class corresponding to spatial class taps received from a tap selecting circuit and motion class taps received from a tap selecting circuit. A line sequential converting circuit converts a scanning line structure of an output signal of the calculating circuitand obtains an output picture signal. The output picture signal is designated with a conversion method selection signal. Information corresponding to the selection signal is loaded from an information memory bank to the coefficient memory and registers.