The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2006
Filed:
Sep. 06, 2002
Applicants:
Thomas L. Thomas, Jr., Austin, TX (US);
Daniel W. Knox, Austin, TX (US);
Inventors:
Thomas L. Thomas, Jr., Austin, TX (US);
Daniel W. Knox, Austin, TX (US);
Assignee:
Freescale Semiconductor, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); H04L 7/00 (2006.01); H04L 7/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
A clock distribution and control system () includes one counter () in a clock generation domain and another counter () in a phase-delayed clock domain. The phase-delayed domain counter () output is combined with a programmable offset value chosen based on the phase delay of the clock distribution system. The result is used to insure that communication between logic in the clock generation clock domain and logic in the phase-delayed clock domain occurs deterministically on the correct clock edge for a range of clock frequencies.