The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2006
Filed:
Oct. 16, 2001
L. James Hwang, Menlo Park, CA (US);
R. Brent Milne, Boulder, CO (US);
Nabeel Shirazi, Los Gatos, CA (US);
Jeffrey D. Stroomer, Lafayette, CO (US);
L. James Hwang, Menlo Park, CA (US);
R. Brent Milne, Boulder, CO (US);
Nabeel Shirazi, Los Gatos, CA (US);
Jeffrey D. Stroomer, Lafayette, CO (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Method and system for creating an electronic circuit design from a system-level environment. A plurality of user-selectable system-level design objects are provided in the system-level environment. Each system-level design object is defined by a system-level function and is selectable by a system-level designer. A plurality of hardware-level design objects are also provided. Each hardware-level design object is configured to generate a hardware definition of a hardware-level function. Each system-level design object maps to one or more hardware-level design objects. In response to selections made by the designer, a system-level design is instantiated in a system-level design file. The system-level design includes user-selected ones of the system-level design objects. The system simulates behavior of the system-level design consistent with both the system-level functions and behavior of a hardware definition from the hardware-level design objects that implement the user-selected ones of the system-level design objects.