The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2006

Filed:

Apr. 22, 2004
Applicants:

Jeffrey B. White, Rolling Meadows, IL (US);

Joseph A. Charaska, Melrose Park, IL (US);

Manuel P. Gabato, Jr., Elmhurst, IL (US);

Paul H. Gailus, Prospect Heights, IL (US);

Robert E. Stengel, Pompano Beach, FL (US);

Inventors:

Jeffrey B. White, Rolling Meadows, IL (US);

Joseph A. Charaska, Melrose Park, IL (US);

Manuel P. Gabato, Jr., Elmhurst, IL (US);

Paul H. Gailus, Prospect Heights, IL (US);

Robert E. Stengel, Pompano Beach, FL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A delay-locked loopthat includes: an adjustable frequency source () for generating a clock signal () having an adjustable frequency; an adjustment and tap selection controller () for determining a first frequency as a function of a second frequency and for causing the frequency source to adjust the frequency of the clock signal to substantially the first frequency, the second frequency being the desired frequency of a first output signal; a delay line () configured to receive the clock signal for generating a plurality of phase-shifted clock signals; and a first selection circuit () for receiving the plurality of phase-shifted clock signals and for selecting, one at a time and under the control of the adjustment and tap selection controller, a first sequence of the phase-shifted clock signals for generating the first output signal having substantially the second frequency.


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