The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2006

Filed:

Mar. 08, 2004
Applicants:

Nathan Moyal, West Linn, OR (US);

Eric Mitchell, Lake Oswego, OR (US);

Mark Gehring, Portland, OR (US);

Inventors:

Nathan Moyal, West Linn, OR (US);

Eric Mitchell, Lake Oswego, OR (US);

Mark Gehring, Portland, OR (US);

Assignee:

Cypress Semiconductor, Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A Phase Locked Loop (PLL) that has a substantially constant gain over a wide frequency range. The frequency range over which the PLL operates is divided into a number of frequency sub-ranges. The circuit includes a mechanism for adjusting the loop gain profile as the PLL moves from one frequency sub-range to another. When the PLL switches to a new frequency sub-range, the loop gain profile is adjusted to a pre-established value. Changes of frequency within each sub-range are then accomplished with the loop gain varying within a pre-established range.


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