The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2006

Filed:

Jun. 07, 2005
Applicants:

Yow-juang W Liu, San Jose, CA (US);

Hugh Sungki O, Fremont, CA (US);

Richard G Cliff, Los Altos, CA (US);

Inventors:

Yow-Juang W Liu, San Jose, CA (US);

Hugh Sungki O, Fremont, CA (US);

Richard G Cliff, Los Altos, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
Abstract

Integrated circuit standby power consumption may be reduced using a reverse-bias transistor control arrangement that reduces transistor leakage current. Integrated circuit transistors may be turned off using a reverse bias voltage rather than a ground voltage. A charge pump circuit on the integrated circuit may be used to generate the reverse bias voltage. The reverse bias voltage may also be provided from an external source. The integrated circuit may be a programmable logic device in which logic is configured by providing programming data to configuration cells. The configuration cells may be used to apply either a positive power supply voltage to a given transistor to turn that transistor on or to provide the reverse bias voltage to that transistor to turn that transistor off.


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