Cmos pixel with dual gate pmos

Abstract

A pixel circuit with a dual gate PMOS is formed by forming two Pregions in an Nwell. The Nwell is in a Ptype substrate. The two Pregions form the source and drain of a PMOS transistor. The PMOS transistors formed within the Nwell will not affect the collection of the photo-generated charge as long as the source and drain potentials of the PMOS transistors are set at a lower potential than the Nwell potential so that they remain reverse biased with respect to the Nwell. One of the Pregions used to form the source and drain regions can be used to reset the pixel after it has been read in preparation for the next cycle of accumulating photo-generated charge. The Nwell forms a second gate for the dual gate PMOS transistor since the potential of the Nwellaffects the conductivity of the channel of the PMOS transistor. The addition of two NMOS transistors enables the readout signal to be stored at the gate of one of the NMOS transistors thereby making a snapshot imager possible. The circuit can be expanded to form two PMOS transistors sharing a common drain in the Nwell.