The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2006

Filed:

Nov. 19, 2004
Applicants:

Myeong-o Kim, Gyeonggi-do, KR;

Sung-min Seo, Gyeonggi-do, KR;

Inventors:

Myeong-O Kim, Gyeonggi-do, KR;

Sung-Min Seo, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention discloses a semiconductor memory device that includes first and second memory banks. A first control signal generating circuit generates a first control signal responsive to an external clock. A first data output circuit transmits a first output data responsive to the first control signal. An internal clock signal generating circuit outputs first and second buffered clock signals responsive to the external clock. A second control signal generating circuit generates a second control signal responsive to the first buffered clock signal and the first control signal. A second data output circuit transmits a second output data responsive to the second control signal. A third data output circuit transmits a third output data responsive to the first and second buffered clock signals. The present invention prevents data read errors resulting from variations in power supply voltage and temperature.


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