The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2006

Filed:

May. 20, 2004
Applicants:

Koji Hamaguchi, Tenri, JP;

Masaru Nawaki, Nara, JP;

Yoshinao Morikawa, Ikomai, JP;

Hiroshi Iwata, Nara, JP;

Akihide Shibata, Nara, JP;

Inventors:

Koji Hamaguchi, Tenri, JP;

Masaru Nawaki, Nara, JP;

Yoshinao Morikawa, Ikomai, JP;

Hiroshi Iwata, Nara, JP;

Akihide Shibata, Nara, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor storage device is provided, which comprises a memory array comprising a plurality of memory elements, a section for performing an erase or program operation with respect to the memory array, a section for receiving a suspend command, and in response to the suspend command, suspending the erase or program operation, and a section for receiving a resume command, and in response to the resume command, resuming the suspended erase or program operation. Each of the plurality of memory elements comprises a gate electrode provided via a gate insulating film on a semiconductor layer, a channel region provided under the gate electrode, diffusion regions provided on opposite sides of the channel region and having a conductivity type opposite to that of the channel region, and memory function sections provided on opposite sides of the gate electrode and having a function of retaining charges.


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