The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 2006
Filed:
May. 04, 2004
Applicants:
Steven J. Zack, Burlington, NJ (US);
William E. Allaire, West Chester, PA (US);
Inventors:
Steven J. Zack, Burlington, NJ (US);
William E. Allaire, West Chester, PA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
Abstract
A programmable logic device includes a block random access memory ('BRAM') that is split into two first in, first out ('FIFO') memory arrays. Two sets of FIFO control logic and FIFO ports are associated with a single BRAM so that the BRAM can be operated as memory buffers for two independent FIFO memory systems.