The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2006

Filed:

Jul. 08, 2004
Applicants:

Romi Mayder, San Jose, CA (US);

Todd Sholl, San Jose, CA (US);

Nasser Ali Jafari, Falls Church, VA (US);

Andrew Tse, Castro Valley, CA (US);

Randy L. Bailey, Fort Collins, CO (US);

Inventors:

Romi Mayder, San Jose, CA (US);

Todd Sholl, San Jose, CA (US);

Nasser Ali Jafari, Falls Church, VA (US);

Andrew Tse, Castro Valley, CA (US);

Randy L. Bailey, Fort Collins, CO (US);

Assignee:

Verigy IPco, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A parallel calibration system for an electronic circuit tester comprises test and measurement electronics, a test fixture coupled to the test and measurement electronics, the test fixture comprising clock reference circuitry and clock distribution circuitry, a device under test interface, and a plurality of calibration boards coupled to the device under test interface, wherein the plurality of calibration boards and the clock distribution circuitry simultaneously test the signal paths of a plurality of test channels.


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