The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2006

Filed:

Jun. 14, 2001
Applicants:

Chia-gee Wang, Millwood, NY (US);

Raphael Tsu, Cornelius, NC (US);

John Clay Lofgren, Chandler, AZ (US);

Inventors:

Chia-Gee Wang, Millwood, NY (US);

Raphael Tsu, Cornelius, NC (US);

John Clay Lofgren, Chandler, AZ (US);

Assignee:

Nanodynamics, Inc., New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 27/01 (2006.01); H01L 27/12 (2006.01); H01L 31/0392 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for producing an insulating or barrier layer (FIG.B), useful for semiconductor devices, comprises depositing a layer of silicon and at least one additional element on a silicon substrate whereby said deposited layer is substantially free of defects such that epitaxial silicon substantially free of defects can be deposited on said deposited layer. Alternatively, a monolayer of one or more elements, preferably comprising oxygen, is absorbed on a silicon substrate. A plurality of insulating layers sandwiched between epitaxial silicon forms a barrier composite. Semiconductor devices are disclosed which comprise said barrier composite.


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