Semiconductor device memory cell

Abstract

The present invention provides an inhibition to the short circuit between the bit line and the capacitance contact, without employing a self alignment contact (SAC) process, in which a hard mask is formed on the upper surface of the bit line and a side wall formed on the side surface of the bit line by etching back a nitride film. A bit contact interlayer film of the conventional semiconductor device which does not have the SAC structure is etched off except the portion where bit line is formed, and then direct nitride film is formed on the entire surface of the top surface and the side surface of the bit line so as to cover the bit line in a same processing step. Since the film thickness of the nitride film disposed on the upper surface of the bit line is designed to be substantially the same as that disposed on the side surface of the nitride film, the height of the bit line itself can be reduced, and thus a further miniaturization becomes possible. In addition, since the nitride film is formed on the side wall of the bit line without requiring an etch back process according to the process of the present invention, the nitride film having a constant film thickness can be easily formed on the side wall of the bit line, as compared with the conventional SAC structure.