The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2006
Filed:
Feb. 26, 2003
Toshiya Uozumi, Takasaki, JP;
Satoshi Tanaka, Tamamura, JP;
Masumi Kasahara, Takasaki, JP;
Hirotaka Oosawa, Isesaki, JP;
Yasuyuki Kimura, Maebashi, JP;
Robert Astle Henshaw, Sudbury, GB;
Toshiya Uozumi, Takasaki, JP;
Satoshi Tanaka, Tamamura, JP;
Masumi Kasahara, Takasaki, JP;
Hirotaka Oosawa, Isesaki, JP;
Yasuyuki Kimura, Maebashi, JP;
Robert Astle Henshaw, Sudbury, GB;
Hitachi, Ltd., Tokyo, JP;
TTP Com Limited, Melbourn, GB;
Abstract
A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.