The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2006

Filed:

Oct. 15, 2004
Applicants:

June Cline, South Burlington, VT (US);

Dinh Dang, Essex Junction, VT (US);

Mark Lagerquist, Colchester, VT (US);

Jeffrey C. Maling, Grand Isle, VT (US);

Lisa Y. Ninomiya, Ridgefield, CT (US);

Bruce W. Porth, Jericho, VT (US);

Steven M. Shank, Jericho, VT (US);

Jessica A. Trapasso, Essex Junction, VT (US);

Inventors:

June Cline, South Burlington, VT (US);

Dinh Dang, Essex Junction, VT (US);

Mark Lagerquist, Colchester, VT (US);

Jeffrey C. Maling, Grand Isle, VT (US);

Lisa Y. Ninomiya, Ridgefield, CT (US);

Bruce W. Porth, Jericho, VT (US);

Steven M. Shank, Jericho, VT (US);

Jessica A. Trapasso, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for etching a deep trench in a semiconductor substrate. The method comprises the steps of (a) forming a hard mask layer on top of the semiconductor substrate, (b) etching a hard mask opening in the hard mask layer so as to expose the semiconductor substrate to the atmosphere through the hard mask layer opening, wherein the step of etching the hard mask opening includes the step of etching a bottom portion of the hard mask opening such that a side wall of the bottom portion of the hard mask opening is substantially vertical, and (c) etching a deep trench in the substrate via the hard mask opening.


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