The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2006

Filed:

Jul. 15, 2005
Applicants:

A. Paul Brokaw, Tucson, AZ (US);

Jeffrey G. Barrow, Tucson, AZ (US);

Marc J. Kobayashi, Oro Valley, AZ (US);

Christian S. Birk, Tucson, AZ (US);

Inventors:

A. Paul Brokaw, Tucson, AZ (US);

Jeffrey G. Barrow, Tucson, AZ (US);

Marc J. Kobayashi, Oro Valley, AZ (US);

Christian S. Birk, Tucson, AZ (US);

Assignee:

Analog Devices, Inc., Norwood, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A switching voltage converter, suitably a boost converter, employs an n-type transistor, preferably an NMOS FET, as a series switch, with its drain coupled to the cathode of the converter's diode and its source coupled to the converter's output node. A charge pump driven by the converter's switching voltage provides a voltage Vat the NMOS FET's gate input sufficient to turn the FET on. A series switch controller is arranged to, in response to a control signal, hold the NMOS FET off such that the converter's output voltage Vis approximately zero regardless of the status of input voltage V, or allow the NMOS device to be turned on by V.


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