The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2006
Filed:
Feb. 18, 2002
Valery I. Tolstikhin, Kanata, CA;
Valery I. Tolstikhin, Kanata, CA;
MetroPhotonics Inc., Ottawa, CA;
Abstract
The invention discloses a method for monolithic integration of active devices within passive semiconductor waveguides and the application of this method for use in InP-based planar wavelength division multiplexing components of optical communication systems. The epitaxial device is grown in a single run and comprises a number of layers, such that the lower part of the structure acts as a single mode passive waveguide while the upper part of the structure contains a planar PIN diode. The PIN structure is present only in the active waveguide portion and absent in all the passive waveguide portions. The active and passive waveguide portions have substantially similar guiding properties with the exception of a mode tail above a top surface of the passive waveguide portion within the active waveguide portion. As a result, an optical signal portion penetrates the I-layer of the PIN structure and interacts with semiconductor material therein for actively affecting an intensity of the optical signal with no substantial changes in guiding properties of the semiconductor waveguide. Embodiments of invention in the form of monolithically integrated waveguide photodetector, electro-absorptive attenuator and semiconductor optical amplifier are disclosed in terms of detailed epitaxial structure, layout and performance characteristics of the device.