The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2006

Filed:

Jun. 18, 2004
Applicants:

Nai-shung Chang, Taipei Hsien, TW;

Chia-hsing Yu, Taipei Hsien, TW;

Lin Yang, Taipei Hsien, TW;

Inventors:

Nai-Shung Chang, Taipei Hsien, TW;

Chia-Hsing Yu, Taipei Hsien, TW;

Lin Yang, Taipei Hsien, TW;

Assignee:

VIA Technologies, Inc., Taipei Hsien, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/14 (2006.01); G06F 15/00 (2006.01); G06F 15/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

The graphics display architecture provided by the present invention comprises an AGP slot, a PCIE slot, and a control chip set. The control chip set comprises a plurality of multi-defined pins, which are electrically coupled to the first pins of the AGP slot and the second pins of the PCIE slot simultaneously. When the first graphics adapter is plugged in the AGP slot and the first graphics adapter complies with AGP interface specification, the multi-defined pins serve to send/receive the signal complied with AGP interface specification. When the first graphics adapter is plugged in the AGP slot and the first graphics adapter complies with the Gfx interface, the multi-defined pins serve to send/receive the signal complied with the Gfx interface. When the second graphics adapter is plugged in the PCIE slot, the multi-defined pins serve to send/receive the signal complied wit the PCIE interface specification.


Find Patent Forward Citations

Loading…