The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2006

Filed:

Jul. 26, 2004
Applicants:

David D. Heston, Dallas, TX (US);

John G. Heston, Murphy, TX (US);

Brian P. Helm, Sachse, TX (US);

Gordon R. Scott, Plano, TX (US);

Scott Mitchel Heston, Dallas, TX (US);

David R. Fletcher, Allen, TX (US);

William S. Kopp, Greensboro, NC (US);

Inventors:

David D. Heston, Dallas, TX (US);

John G. Heston, Murphy, TX (US);

Brian P. Helm, Sachse, TX (US);

Gordon R. Scott, Plano, TX (US);

Scott Mitchel Heston, Dallas, TX (US);

David R. Fletcher, Allen, TX (US);

William S. Kopp, Greensboro, NC (US);

Assignee:

Raytheon Company, Waltham, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment of the present invention a method for biasing a power amplifier having at least one transistor exhibiting kink anomaly includes providing a bias circuit coupled to a gate of at least one transistor of the power amplifier. The method also includes providing, by the bias circuit, a bias voltage to the gate. The bias circuit has a load characteristic that intersects a current versus gate voltage curve for the gate at a frequency of operation of the power amplifier only once and that exhibits a low impedance at the intersection of the load characteristic with the current versus gate curve of the gate.


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