The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2006
Filed:
Aug. 25, 2004
Applicants:
Kase Kiyoshi, Austin, TX (US);
May Len, Cedar Park, TX (US);
Dzung T. Tran, Austin, TX (US);
Inventors:
Assignee:
Freescale Semiconductor, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 19/03 (2006.01); H03K 19/0175 (2006.01); H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
Abstract
An output buffer circuit () includes an output driver transistor (), a predriver circuit (), and a bias generator (). The predriver circuit () has an input terminal for receiving an input signal (IN), a first terminal coupled to a power supply voltage terminal, a second terminal, and an output terminal coupled to the control electrode of the transistor (). The bias generator () is coupled to the second terminal of the predriver circuit (), and provides a bias voltage (V) to the second terminal of the predriver circuit () for controlling the gate voltage of the output driver transistor ().