The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2006
Filed:
Nov. 12, 2004
Stephen Oliver, Redondo Beach, CA (US);
Marco Soldano, El Segundo, CA (US);
Mark Pavier, West Sussex, GB;
Glyn Connah, Glossop, GB;
Ajit Dubhashi, Redondo Beach, CA (US);
Stephen Oliver, Redondo Beach, CA (US);
Marco Soldano, El Segundo, CA (US);
Mark Pavier, West Sussex, GB;
Glyn Connah, Glossop, GB;
Ajit Dubhashi, Redondo Beach, CA (US);
International Rectifier Corporation, El Segundo, CA (US);
Abstract
A low profile semiconductor device package includes a lead frame with terminal leads and two die pads for receiving at least two semiconductor die that are interconnected to form a circuit. A further low profile semiconductor device package includes a lead frame with two die pads for receiving at least two semiconductor die that are interconnected to form a circuit and also has a reduced height through removal of a mounting tab. An example of such device packages is a package that includes first and second MOSFET die, each connected to a respective die pad. The source of one MOSFET is connected to the drain of the other MOSFET, thereby forming a low profile device package that provides a half-bridge circuit. Other example device packages include different arrangements of two interconnected MOSFET die, two interconnected IGBTs, or a combination of a MOSFET die and a diode.