The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2006

Filed:

Oct. 17, 2003
Applicants:

Jin-tau Huang, Tao-Yuan Hsien, TW;

Chung-peng Hao, Taipei Hsien, TW;

Yi-nan Chen, Taipei, TW;

Tse-yao Huang, Taipei, TW;

Inventors:

Jin-Tau Huang, Tao-Yuan Hsien, TW;

Chung-Peng Hao, Taipei Hsien, TW;

Yi-Nan Chen, Taipei, TW;

Tse-Yao Huang, Taipei, TW;

Assignee:

Nanya Technology Corp., Tao-Yuan Hsien, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a gate structure. First, a substrate is provided, and a gate oxide layer, a polysilicon layer, a silicide layer, and a cap layer are consecutively formed onto the substrate. Then, an etching process is performed to etch a portion of the cap layer, the silicide layer, and the polysilicon layer and stop on the polysilicon layer for forming a stacked gate. Thereafter, a portion of the silicide layer exposed on sidewalls of the stacked gate is removed to form a recess. A passivation layer is deposited to fill the recess. The remaining polysilicon layer and the gate oxide layer outside the sidewalls of the stacked gate structure are removed.


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